Lecture 16 | Computer Architecture

Completing the Hack Computer

CPU control, data memory, and whole-computer integration.

From Parts to a Computer

What Remains After the Construction Attempt?

We already have the components. The remaining task is to connect them and generate the right control signals.

Boolean logicGates and multiplexors
→
ArithmeticALU
→
Sequential logicRegisters, RAM, PC
→
Machine languageInstruction meanings
Today's goal

Complete the CPU, Memory, and top-level Computer so that Hack machine-language programs can execute.

Next: What must the CPU expose?

Hack CPU

The CPU Contract

Chip name: CPU

Inputs: inM[16], instruction[16], reset

Outputs: outM[16], writeM, addressM[15], pc[15]

Function: Execute the current Hack instruction. If reset=1, make the next program address 0.

inM is the value currently read from RAM[A]. The three M outputs together form a possible write request; pc selects the next ROM word.

Exercise 1

Follow a Memory Write

The current instruction is M=D+1. Which CPU output carries each part of the request?

Value to storeoutM = ALU output
Write enablewriteM=1
Destination addressaddressM=A[0..14]

When writeM=0, the value appearing on outM is ignored by Memory.

Hack CPU | Datapath

The Data and Address Paths

Hack CPU datapath The instruction or ALU output can enter A. D supplies the ALU x input. A or inM supplies its y input. The ALU result can enter A, D, or Memory. A also supplies addressM and a possible PC input. A register D register ALU PC Mux Mux instruction inM A y x = D outM ALU output may load D ALU output may load A addressM A pc

This is only the datapath. Control logic must still decide what each multiplexor selects, which registers load, whether Memory writes, and whether the PC jumps.

Hack CPU | Control Logic

Three Control Problems

1Decode

Is this an A-instruction or C-instruction? What do its fields mean?

2Execute

Select ALU inputs and function, then enable the requested destinations.

3Fetch next

Increment the Program Counter, load a jump target, or reset it to 0.

Next: Derive the control signals from the instruction bits.

Hack CPU | Instruction Decoding

The First Bit Determines the Meaning

A-instruction0 vvvvvvvvvvvvvvv

Load the 15-bit constant into A.

C-instruction111 a cccccc ddd jjj

a,c: compute   d: destination   j: jump

For an A-instruction: A must load the instruction constant.

For a C-instruction: the fields control the ALU, destinations, and jump logic.

Exercise 2

Derive the A-Register Controls

A. When should A load?

It loads for every A-instruction, and for a C-instruction whose A-destination bit is 1.

loadA = !i OR (i AND dA)
B. What value should A receive?

Select the instruction constant for an A-instruction; select the ALU result for a C-instruction.

A multiplexor controlled by the instruction-type bit i.
Hack CPU | Instruction Execution

Compute, Then Route the Result

ALU inputs
  • x = D
  • y = A when a=0
  • y = inM when a=1
ALU function
  • The six c-bits connect to zx,nx,zy,ny,f,no.
  • The ALU produces the result, zr, and ng.
Destinations
  • dA loads A
  • dD loads D
  • dM requests a Memory write

Destination bits are control signals only in a C-instruction. Thus writeM = i AND dM.

Exercise 3

Trace Three Instructions

InstructionALU xALU yDestination
D=D+ADAD
M=D+1DunusedMemory at A
A=D-1DunusedA

For D=D+M, the ALU y input is inM, so the instruction's a-bit must be 1.

Hack CPU | Jump Control

Choose the Next Instruction

ALU status

zr=1: result is zero

ng=1: result is negative

positive = !zr AND !ng

Program Counter rule

If the C-instruction's jump condition accepts the ALU result, load PC=A.

Otherwise, increment the PC.

If reset=1, reset wins: PC=0.

A taken jump uses the A-register value that was already present at the start of the clock cycle.

Exercise 4

What Is the Next Program Counter?

PC=20, A=50, D;JGT, ALU result = 3

PC=50

PC=20, A=50, D;JGT, ALU result = 0

PC=21

PC=20, A=50, 0;JMP

PC=50

PC=20, A=50, reset=1

PC=0

Next: Present RAM, screen, and keyboard as one Memory chip.

Hack Memory

One Logical Address Space, Three Devices

Chip name: Memory

Inputs: in[16], load, address[15]

Output: out[16]

Function: Read the addressed word continuously. If load=1, write in to the addressed writable device in the next cycle.

Screen behaves like writable RAM and refreshes pixels. Keyboard is read-only and continuously reports the current key code, or 0.

Exercise 5

Design the Memory Routing

Using a demultiplexor, a multiplexor, and address bits, sketch how one Memory interface can select RAM16K, Screen, or Keyboard.

A

Which device receives address 20000?

Screen
B

Which device receives address 24576?

Keyboard
C

Why must Keyboard not receive load?

It is an input-only, read-only device.
D

What returns to out?

The output of the selected device.

Next: Connect CPU, Memory, and ROM32K.

The Hack Computer

The Top-Level Contract and Wiring

Chip name: Computer

Input: reset

Function: When reset=0, execute the program stored in ROM. When reset=1, restart at instruction address 0.

ROM32KInput: address[15]Output: out[16]Function: out=ROM[address]; the program is preloaded.
Hack Computer wiring The CPU program counter addresses ROM32K, ROM supplies the instruction, the CPU sends write requests to Memory, and Memory returns inM. ROM32Kinstruction memory CPUdecode and execute MemoryRAM + screen + keyboard instruction outM, writeM, addressM inM pc selects ROM address reset

The Computer needs no ordinary data pins: programs communicate through its memory-mapped screen and keyboard.

Exercise 6

Trace One Whole-Computer Step

Suppose PC=12, ROM[12] contains M=D+1, and A=100.

  1. Which component supplies the instruction? ROM32K
  2. Which component computes D+1? The CPU's ALU
  3. Where is the result written? Memory address 100
  4. What is the next instruction address? 13, because there is no jump
Building and Testing

Verify the Computer in Layers

1Test Memory

Check RAM, screen, and keyboard address selection and write timing.

2Test CPU

Check A/C decoding, destinations, ALU controls, jumps, and reset.

3Test Computer

Run known programs such as Add.hack, Max.hack, and Rect.hack.

Perspective

Modern computers add more registers, caches, pipelines, parallelism, and richer instructions. Yet the same ideas remain visible: stored programs, CPU, registers, Program Counter, memory, and input/output.

Next: Reconstruct the complete hardware hierarchy.

Summary of This Lecture

The Hardware Platform Is Complete

CPU

Decodes each instruction, computes with the ALU, stores results, and selects the next PC.

Memory

Presents RAM16K, Screen, and Keyboard as one logical address space.

Computer

Connects ROM32K, CPU, and Memory so stored machine-language programs can run.

Nand → gates → ALU and registers → CPU and Memory → Computer