Lecture 4 | 6 August 2026 | Tutorial

Boolean Laws and Logic Design

Simplify expressions, reason with truth tables, draw circuits, and describe them in HDL.

lawssimplificationgate diagramsHDL
Boolean laws

Boolean Laws

LawORAND
Commutativex + y = y + xx · y = y · x
Associativex + (y + z) = (x + y) + zx · (y · z) = (x · y) · z
Distributivex + y · z = (x + y)(x + z)x(y + z) = x · y + x · z
Identityx + 0 = xx · 1 = x
Annihilatorx + 1 = 1x · 0 = 0
Idempotencex + x = xx · x = x
Absorptionx + x · y = xx(x + y) = x
Complement with AND

x · x = 0

Complement with OR

x + x = 1

Double negation

x = x

Take-home exercise: Verify all the laws using truth tables.

Boolean laws

De Morgan's Laws Move Negation Across an Operation

Negation of OR

x + y = x · y

NOT OR becomes AND of the negated inputs.
Negation of AND

x · y = x + y

NOT AND becomes OR of the negated inputs.

De Morgan's laws are consequences of the Boolean laws on the previous page.

Exercise 1 | Verify equivalence

Check the Laws Using Truth Tables

A

Verify x + x · y = x.

B

Verify x + y = x · y.

C

Verify x + y · z = (x+y)(x+z).

Next: Use these laws to make expressions simpler.

Simplification

Replace Part of an Expression with an Equivalent Form

Find

a subexpression that matches a Boolean law

Replace

only that subexpression with its equivalent

Repeat

until no further useful simplification is visible

Every step must preserve the function for every possible input.

Exercise 2 | Guided simplification

Simplify: y + x · x

Start

y + x · x

Complementation with AND

y + 0

because x · x = 0
OR identity

y

because y + 0 = y
A

x + x · y

= x by absorption.

B

x + x · y

=(x+x)(x+y)=1(x+y)=x+y.

C

(x+y)(x+z)

= x + y · z by distributivity.

Exercise 3 | Simplification

Simplify These Without Revealed Answers

D

x · y + x · y

E

x · y + x(y+z)

F

x + xy + x · y

G

(x+y)(x+y)

H

xy + x(y+z) + y(y+c)

I

(xy(z+ya) + x · y)z

J

(x+y+z)(x+y+z)

K

x(y+yz) + xz

Do not expand everything automatically. Look first for complement, absorption, or a common factor.

Exercise 4 | From a circuit to an expression

Write the Boolean Expression

A logic circuit is the same as a gate diagram: it shows how gates are connected to implement a Boolean function.

abcORw1w2ANDout

Write w1, w2, and out.

Then write HDL for a chip named CircuitB.

w1 = a+b

w2 = c

out = (a+b) · c

Exercise 5 | Demultiplexor

Draw and Describe DMux

Chip name: DMuxInputs: in, selOutputs: a, bFunction: If sel=0, then a=in and b=0; else a=0 and b=in.
  1. Write Boolean expressions for a and b.
  2. Draw the gate diagram using AND and NOT.
  3. Write DMux.hdl.

a = in · sel

b = in · sel

Exercise 6 | Four-way routing

Build DMux4Way from DMux Gates

selabcd
00in000
010in00
1000in0
11000in
  1. Use one DMux controlled by sel[1] to choose the upper or lower pair.
  2. Use two more DMux gates controlled by sel[0].
  3. Draw the full diagram and label intermediate wires.
  4. Write DMux4Way.hdl.

Stage 1: split in into two intermediate wires.

Stage 2: split each intermediate wire into two outputs.

Exercise 7 | Additional designs

Specify and Design Each Chip

1. Specification name, inputs, outputs, function2. Expression required Boolean function3. Gate diagram labelled gates and wires4. HDL interface and part connections
A | CoreMajority3

Output 1 when at least two of a,b,c are 1.

B | CoreEqual2

Output 1 when inputs a and b are equal.

C | CoreMux

Use only AND, OR, and NOT gates.

D | CoreOr4Way

Output 1 when at least one bit in in[4] is 1.

E | ChallengeExactlyOne3

Output 1 when exactly one of a,b,c is 1.

F | ChallengeTwoOfFour

Output 1 when exactly two of a,b,c,d are 1.

G | ChallengeMux4Way16

Select one of four 16-bit inputs using sel[2].

H | ChallengeDMux8Way

Route in to one of eight outputs using sel[3].

What to remember

Equivalent Forms Let Us Choose a Better Design

Laws

justify algebraic transformations

Truth tables

verify that two forms agree on every input

Gate diagrams

show the structure of a circuit

HDL

records the same structure precisely

Next lecture: Begin Boolean Arithmetic with binary representation, addition, and two's complement.